General Purpose Registers (GPRs)
- The breakdown of the names of memory sizes:
- Quad Word = 8 Bytes = 64 bits
- Double Word = 4 bytes = 32 bits
- Word = 2 bytes = 16 bits
- Byte = 1 byte = 8 bits
| 64-bit | 32-bit | 16-bit | 8-bit high | 8-bit low | Use / Notes |
|---|---|---|---|---|---|
| RAX | EAX | AX | AH | AL | Accumulator, division/multiplication results |
| RBX | EBX | BX | BH | BL | Base register (often used as general storage) |
| RCX | ECX | CX | CH | CL | Counter (used for shifts/loops) |
| RDX | EDX | DX | DH | DL | Data register (division remainder, I/O) |
| RSI | ESI | SI | – | SIL | Source index (string/memory ops) |
| RDI | EDI | DI | – | DIL | Destination index |
| RBP | EBP | BP | – | BPL | Base pointer (stack frames) |
| RSP | ESP | SP | – | SPL | Stack pointer |
| R8 | R8D | R8W | – | R8B | Extra GPR (x86-64 only) |
| R9 | R9D | R9W | – | R9B | Extra GPR |
| R10 | R10D | R10W | – | R10B | Extra GPR |
| R11 | R11D | R11W | – | R11B | Extra GPR |
| R12 | R12D | R12W | – | R12B | Extra GPR |
| R13 | R13D | R13W | – | R13B | Extra GPR |
| R14 | R14D | R14W | – | R14B | Extra GPR |
| R15 | R15D | R15W | – | R15B | Extra GPR |
Pointer and Instruction Registers
- RIP (64-bit Instruction Pointer)—where the CPU is executing.
- EIP/IP—32-bit / 16-bit versions (in 32-bit / 16-bit mode).
- RSP—stack pointer (top of stack).
- RBP—base/frame pointer.
Segment Registers (legacy, Rarely Used now)
- CS (Code Segment)
- DS (Data Segment)
- SS (Stack Segment)
- ES, FS, GS (extra segment registers; FS/GS still used in x86-64 for thread-local storage and OS stuff).
Flags Register
- RFLAGS (64-bit) / EFLAGS / FLAGS—contains condition codes: ZF (zero), CF (carry), SF (sign), OF (overflow), etc. Used by
cmp,test, conditional jumps.
SIMD / Floating Point Registers
- XMM0–XMM15—128-bit SSE registers
- YMM0–YMM15—256-bit AVX (upper half extends XMM)
- ZMM0–ZMM31—512-bit AVX-512 (extends YMM/XMM)
- ST(0)–ST(7)—old x87 FPU stack registers
Visual Example: Sub-register Hierarchy of RAX
64-bit RAX = [63 ............... 0]
32-bit EAX = [31 ............... 0]
16-bit AX = [15 ............... 0]
8-bit AH = [15 .... 8] AL = [7 .... 0]Same idea applies to RBX/RCX/RDX.
For R8–R15, the split is simpler: they only have low 8-bit (R8B), 16-bit (R8W), 32-bit (R8D), and 64-bit (R8), no AH/BH/CH/DH.
Where to Study Further
- Intel® 64 and IA-32 Architectures Software Developer’s Manual, Vol. 1 (the definitive reference).
- A lighter summary: https://wiki.osdev.org/CPU_Registers_x86
Resources
| Resource | Description |
|---|---|
| Guide to Using Assembly in Visual Studio | a tutorial on building and debugging assembly code in Visual Studio |
| Intel x86 Instruction Set Reference | |
| Intel’s Pentium Manuals | the full gory details |
| x64 ABI conventions | Microsoft Learn | This topic describes the basic application binary interface (ABI) for x64, the 64-bit extension to the x86 architecture. It covers topics such as the calling convention, type layout, stack and register usage, and more. |